1045 search results - page 65 / 209 » Improving SHA-2 Hardware Implementations |
125
Voted
EGH
2011
Springer
14 years 18 days ago
2011
Springer
In this paper, we implement an efficient, completely software-based graphics pipeline on a GPU. Unlike previous approaches, we obey ordering constraints imposed by current graphi...
99
Voted
FCCM
2007
IEEE
15 years 7 months ago
2007
IEEE
This paper provides an evaluation of SGI® RASC™ RC100 technology from a computational science software developer’s perspective. A brute force implementation of a two-point an...
99
Voted
DATE
2009
IEEE
15 years 7 months ago
2009
IEEE
—With wide applicability of flash memory in various application domains, reliability has become a very critical issue. This research is motivated by the needs to resolve the lif...
DATE
2007
IEEE
15 years 7 months ago
2007
IEEE
This paper presents a built-in self-test (BiST) scheme for analog to digital converters (ADC) based on a linear ramp generator and efficient output analysis. The proposed analysi...
118
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IWMM
2011
Springer
14 years 3 months ago
2011
Springer
In a parallel, shared-memory, language with a garbage collected heap, it is desirable for each processor to perform minor garbage collections independently. Although obvious, it i...