1045 search results - page 88 / 209 » Improving SHA-2 Hardware Implementations |
ISCA
2006
IEEE
15 years 6 months ago
2006
IEEE
This paper presents a high-availability system architecture called INDRA — an INtegrated framework for Dependable and Revivable Architecture that enhances a multicore processor ...
100
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MICRO
2006
IEEE
15 years 6 months ago
2006
IEEE
We present and evaluate the idea of adaptive processor cache management. Specifically, we describe a novel and general scheme by which we can combine any two cache management alg...
131
Voted
ACMMSP
2006
ACM
15 years 6 months ago
2006
ACM
This paper proposes and studies a distributed L2 cache management approach through page-level data to cache slice mapping in a future processor chip comprising many cores. L2 cach...
108
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EUROCAST
2001
Springer
15 years 5 months ago
2001
Springer
CAST.FSM denotes a CAST tool which has been developed at the Institute of Systems Science at the University of Linz during the years 1986-1993. The first version of CAST.FSM was i...
144
Voted
ATS
2001
IEEE
15 years 4 months ago
2001
IEEE
Testing and diagnosis are important issues in system-onchip (SOC) development, as more and more embedded cores are being integrated into the chips. In this paper we propose a buil...