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TCAD
2008
114views more  TCAD 2008»
14 years 9 months ago
Word-Level Predicate-Abstraction and Refinement Techniques for Verifying RTL Verilog
el Predicate Abstraction and Refinement Techniques for Verifying RTL Verilog Himanshu Jain, Daniel Kroening, Natasha Sharygina, and Edmund M. Clarke, Fellow, IEEE As a first step, ...
Himanshu Jain, Daniel Kroening, Natasha Sharygina,...
ICST
2009
IEEE
14 years 7 months ago
Penetration Testing with Improved Input Vector Identification
Penetration testing is widely used to help ensure the security of web applications. It discovers vulnerabilities by simulating attacks from malicious users on a target application...
William G. J. Halfond, Shauvik Roy Choudhary, Ales...
HPDC
2012
IEEE
13 years 15 hour ago
Dynamic adaptive virtual core mapping to improve power, energy, and performance in multi-socket multicores
Consider a multithreaded parallel application running inside a multicore virtual machine context that is itself hosted on a multi-socket multicore physical machine. How should the...
Chang Bae, Lei Xia, Peter A. Dinda, John R. Lange
VAMOS
2007
Springer
15 years 3 months ago
Visualisation of Variability in Software Product Line Engineering
Using a product line approach allows companies realize significant improvements in time-to-market, cost, productivity, and quality. One fundamental problem in software product lin...
Daren Nestor, Luke O'Malley, Aaron J. Quigley, Ern...
CODES
2009
IEEE
15 years 4 months ago
FRA: a flash-aware redundancy array of flash storage devices
Since flash memory has many attractive characteristics such as high performance, non-volatility, low power consumption and shock resistance, it has been widely used as storage med...
Yangsup Lee, Sanghyuk Jung, Yong Ho Song