Sciweavers

3 search results - page 1 / 1
» Improving Synthesis of Compressor Trees on FPGAs via Integer...
Sort
View
DATE
2008
IEEE
143views Hardware» more  DATE 2008»
14 years 17 days ago
Improving Synthesis of Compressor Trees on FPGAs via Integer Linear Programming
Multi-input addition is an important operation for many DSP and video processing applications. On FPGAs, multi-input addition has traditionally been implemented using trees of car...
Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
14 years 3 months ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He
ASE
2005
137views more  ASE 2005»
13 years 6 months ago
Rewriting-Based Techniques for Runtime Verification
Techniques for efficiently evaluating future time Linear Temporal Logic (abbreviated LTL) formulae on finite execution traces are presented. While the standard models of LTL are i...
Grigore Rosu, Klaus Havelund