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» Improving Transition Delay Test Using a Hybrid Method
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ICASSP
2011
IEEE
14 years 1 months ago
Multistream speaker diarization through Information Bottleneck system outputs combination
Speaker diarization of meetings recorded with Multiple Distant Microphones makes extensive use of multiple feature streams like MFCC and Time Delay of Arrivals (TDOA). Typically t...
Deepu Vijayasenan, Fabio Valente, Petr Motlí...
TCAD
2008
136views more  TCAD 2008»
14 years 9 months ago
A Geometric Programming-Based Worst Case Gate Sizing Method Incorporating Spatial Correlation
We present an efficient optimization scheme for gate sizing in the presence of process variations. Our method is a worst-case design scheme, but it reduces the pessimism involved i...
Jaskirat Singh, Zhi-Quan Luo, Sachin S. Sapatnekar
BIOCOMP
2008
14 years 11 months ago
Reverse Engineering Module Networks by PSO-RNN Hybrid Modeling
Background: Inferring a gene regulatory network (GRN) from high throughput biological data is often an under-determined problem and is a challenging task due to the following reas...
Yuji Zhang, Jianhua Xuan, Benildo de los Reyes, Ro...
BMCBI
2005
78views more  BMCBI 2005»
14 years 9 months ago
Correlation test to assess low-level processing of high-density oligonucleotide microarray data
Background: There are currently a number of competing techniques for low-level processing of oligonucleotide array data. The choice of technique has a profound effect on subsequen...
Alexander Ploner, Lance D. Miller, Per Hall, Jonas...
VLSID
2007
IEEE
131views VLSI» more  VLSID 2007»
15 years 10 months ago
Probabilistic Self-Adaptation of Nanoscale CMOS Circuits: Yield Maximization under Increased Intra-Die Variations
As technology scales to 40nm and beyond, intra-die process variability will cause large delay and leakage variations across a chip in addition to expected die-to-die variations. I...
Maryam Ashouei, Muhammad Mudassar Nisar, Abhijit C...