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» Improving Transition Delay Test Using a Hybrid Method
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EURODAC
1994
IEEE
127views VHDL» more  EURODAC 1994»
15 years 1 months ago
Optimal equivalent circuits for interconnect delay calculations using moments
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
Sudhakar Muddu, Andrew B. Kahng
CDC
2010
IEEE
130views Control Systems» more  CDC 2010»
14 years 4 months ago
Stability analysis of networked control systems: A sum of squares approach
This paper presents a sum of squares (SOS) approach to the stability analysis of networked control systems (NCSs) incorporating time-varying delays and time-varying transmission in...
Nicolas William Bauer, Paul J. H. Maas, W. P. M. H...
DATE
2005
IEEE
172views Hardware» more  DATE 2005»
15 years 3 months ago
Evolutionary Optimization in Code-Based Test Compression
We provide a general formulation for the code-based test compression problem with fixed-length input blocks and propose a solution approach based on Evolutionary Algorithms. In c...
Ilia Polian, Alejandro Czutro, Bernd Becker
TCAD
2002
134views more  TCAD 2002»
14 years 9 months ago
DS-LFSR: a BIST TPG for low switching activity
A test pattern generator (TPG) for built-in self-test (BIST), which can reduce switching activity during test application, is proposed. The proposed TPG, called dual-speed LFSR (DS...
Seongmoon Wang, Sandeep K. Gupta
IFIP
2001
Springer
15 years 2 months ago
Functional Test Generation using Constraint Logic Programming
— Semi-formal verification based on symbolic simulation offers a good compromise between formal model checking and numerical simulation. The generation of functional test vector...
Zhihong Zeng, Maciej J. Ciesielski, Bruno Rouzeyre