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DATE
2000
IEEE
86views Hardware» more  DATE 2000»
15 years 8 months ago
A New Partitioning Method for Parallel Simulation of VLSI Circuits on Transistor Level
Simulation is still one of the most important subtasks when designing a VLSI circuit. However, more and more elements on a chip increase simulation runtimes. Especially on transis...
Norbert Fröhlich, Volker Gloeckel, Josef Flei...
ISPASS
2006
IEEE
15 years 10 months ago
Critical path analysis of the TRIPS architecture
Fast, accurate, and effective performance analysis is essential for the design of modern processor architectures and improving application performance. Recent trends toward highly...
Ramadass Nagarajan, Xia Chen, Robert G. McDonald, ...
IIWAS
2008
15 years 5 months ago
A model-prover for constrained dynamic conversations
In a service-oriented architecture, systems communicate by exchanging messages. In this work, we propose a formal model based on OCL-constrained UML Class diagrams and a methodolo...
Diletta Cacciagrano, Flavio Corradini, Rosario Cul...
BMCBI
2008
93views more  BMCBI 2008»
15 years 4 months ago
Using iterative cluster merging with improved gap statistics to perform online phenotype discovery in the context of high-throug
Background: The recent emergence of high-throughput automated image acquisition technologies has forever changed how cell biologists collect and analyze data. Historically, the in...
Zheng Yin, Xiaobo Zhou, Chris Bakal, Fuhai Li, You...
CORR
2006
Springer
147views Education» more  CORR 2006»
15 years 4 months ago
Models simulation and interoperability using MDA and HLA
: In the manufacturing context, there have been numerous efforts to use modeling and simulation tools and techniques to improve manufacturing efficiency over the last four decades....
Hind El Haouzi