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DAC
2006
ACM
16 years 7 months ago
Subthreshold logical effort: a systematic framework for optimal subthreshold device sizing
Subthreshold circuit designs have been demonstrated to be a successful alternative when ultra-low power consumption is paramount. However, the characteristics of MOS transistors i...
John Keane, Hanyong Eom, Tae-Hyoung Kim, Sachin S....
WSC
2007
15 years 8 months ago
Allocation of simulation runs for simulation optimization
Simulation optimization (SO) is the process of finding the optimum design of a system whose performance measure(s) are estimated via simulation. We propose some ideas to improve o...
Alireza Kabirian, Sigurdur Ólafsson
ICPR
2002
IEEE
16 years 7 months ago
Integrated Event Recognition from Multiple Sources
This paper proposes a system architecture for event recognition that integrates information from multiple sources (e.g., gesture and speech recognition from distributed sensors in...
Hiroaki Kawashima, Takashi Matsuyama
APSEC
2003
IEEE
15 years 11 months ago
An XVCL Approach to Handling Variants: A KWIC Product Line Example
We developed XVCL (XML-based Variant Configuration Language), a method and tool for product lines, to facilitate handling variants in reusable software assets (such as architectur...
Hongyu Zhang, Stan Jarzabek
DAC
2006
ACM
16 years 7 months ago
Charge recycling in MTCMOS circuits: concept and analysis
Designing an energy efficient power gating structure is an important and challenging task in Multi-Threshold CMOS (MTCMOS) circuit design. In order to achieve a very low power des...
Ehsan Pakbaznia, Farzan Fallah, Massoud Pedram