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ASAP
2008
IEEE
105views Hardware» more  ASAP 2008»
14 years 12 months ago
Fast custom instruction identification by convex subgraph enumeration
Automatic generation of custom instruction processors from high-level application descriptions enables fast design space exploration, while offering very favorable performance and...
Kubilay Atasu, Oskar Mencer, Wayne Luk, Can C. &Ou...
ACL
2000
14 years 11 months ago
An Improved Parser for Data-Oriented Lexical-Functional Analysis
We present an LFG-DOP parser which uses fragments from LFG-annotated sentences to parse new sentences. Experiments with the Verbmobil and Homecentre corpora show that (1) Viterbi ...
Rens Bod
HIPC
2004
Springer
15 years 3 months ago
Lock-Free Parallel Algorithms: An Experimental Study
Abstract. Lock-free shared data structures in the setting of distributed computing have received a fair amount of attention. Major motivations of lock-free data structures include ...
Guojing Cong, David A. Bader
TRETS
2010
142views more  TRETS 2010»
14 years 8 months ago
Performance Analysis Framework for High-Level Language Applications in Reconfigurable Computing
s, and abstractions, typically enabling faster development times than with traditional Hardware ion Languages (HDLs). However, programming at a higher level of abstraction is typic...
John Curreri, Seth Koehler, Alan D. George, Brian ...
JIRS
2007
108views more  JIRS 2007»
14 years 9 months ago
Task-based Hardware Reconfiguration in Mobile Robots Using FPGAs
This paper presents a methodology for the realization of intelligent, task-based reconfiguration of the computational hardware for mobile robot applications. Task requirements are ...
Sesh Commuri, V. Tadigotla, L. Sliger