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ISLPED
2003
ACM
115views Hardware» more  ISLPED 2003»
15 years 3 months ago
Reducing energy and delay using efficient victim caches
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
Gokhan Memik, Glenn Reinman, William H. Mangione-S...
DATE
2002
IEEE
135views Hardware» more  DATE 2002»
15 years 2 months ago
Reducing Test Application Time Through Test Data Mutation Encoding
In this paper we propose a new compression algorithm geared to reduce the time needed to test scan-based designs. Our scheme compresses the test vector set by encoding the bits th...
Sherief Reda, Alex Orailoglu
EUROPAR
2003
Springer
15 years 3 months ago
Implementation and Performance Evaluation of M-VIA on AceNIC Gigabit Ethernet Card
This paper describes the implementation and performance of M-VIA on the AceNIC Gigabit Ethernet card. The AceNIC adapter has several notable hardware features for high-speed commun...
In-Su Yoon, Sang-Hwa Chung, Ben Lee, Hyuk-Chul Kwo...
IH
2005
Springer
15 years 3 months ago
Data Hiding in Compiled Program Binaries for Enhancing Computer System Performance
Abstract. Information hiding has been studied in many security applications such as authentication, copyright management and digital forensics. In this work, we introduce a new app...
Ashwin Swaminathan, Yinian Mao, Min Wu, Krishnan K...
INCDM
2010
Springer
204views Data Mining» more  INCDM 2010»
15 years 1 months ago
Combining Business Process and Data Discovery Techniques for Analyzing and Improving Integrated Care Pathways
Hospitals increasingly use process models for structuring their care processes. Activities performed to patients are logged to a database but these data are rarely used for managin...
Jonas Poelmans, Guido Dedene, Gerda Verheyden, Her...