5523 search results - page 127 / 1105 » Improving application performance with hardware data structu... |
SWAT
2004
Springer
15 years 3 months ago
2004
Springer
We present improved cache-oblivious data structures and algorithms for breadth-first search and the single-source shortest path problem on undirected graphs with non-negative edge...
EIT
2008
IEEE
14 years 11 months ago
2008
IEEE
Abstract--Real-time image and multimedia processing applications such as video surveillance and telemedicine can have dynamic requirements of system latency, throughput, and power ...
101
click to vote
COMPGEOM
2000
ACM
15 years 2 months ago
2000
ACM
: We present a new approach for computing generalized Voronoi diagrams in two and three dimensions using interpolation-based polygon rasterization hardware. The input primitives ma...
120
click to vote
NCA
2006
IEEE
14 years 10 months ago
2006
IEEE
The use of multilayer perceptrons (MLP) with threshold functions (binary step function activations) greatly reduces the complexity of the hardware implementation of neural networks...
EUROSYS
2007
ACM
14 years 11 months ago
2007
ACM
Hardware trends suggest that large-scale CMP architectures, with tens to hundreds of processing cores on a single piece of silicon, are iminent within the next decade. While exist...