The performance of a computer system is highly dependent on the performance of the cache memory system. The traditional cache memory system has an organization with a line size tha...
Dan Nicolaescu, Xiaomei Ji, Alexander V. Veidenbau...
1 The low throughput at IC (Integrated Circuit) testing is mainly due to the increasing test data volume, which leads to high ATE (Automatic Test Equipment) memory requirements and...
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...
Samir Ammenouche, Sid Ahmed Ali Touati, William Ja...
— This paper introduces our recently developed high precision robot localization system employing position sensitive detectors (PSD). A lateral effect PSD is an ideal position se...
S. Blank, Yantao Shen, Ning Xi, Chi Zhang, Uchechu...
We present RSIO, a processor scheduling framework for improving the response time of latency-sensitive applications by monitoring accesses to I/O channels and inferring when user ...