Sciweavers

5523 search results - page 76 / 1105
» Improving application performance with hardware data structu...
Sort
View
IPPS
2006
IEEE
15 years 3 months ago
Making lockless synchronization fast: performance implications of memory reclamation
Achieving high performance for concurrent applications on modern multiprocessors remains challenging. Many programmers avoid locking to improve performance, while others replace l...
Thomas E. Hart, Paul E. McKenney, Angela Demke Bro...
JPDC
2007
84views more  JPDC 2007»
14 years 9 months ago
Performance of memory reclamation for lockless synchronization
Achieving high performance for concurrent applications on modern multiprocessors remains challenging. Many programmers avoid locking to improve performance, while others replace l...
Thomas E. Hart, Paul E. McKenney, Angela Demke Bro...

Publication
117views
14 years 6 months ago
Design, Implementation, and Performance Analysis of DiscoSec–Service Pack for Securing WLANs
To improve the already tarnished reputation of WLAN security, the new IEEE 802.11i security standard provides means for an enhanced user authentication and strong data confidential...
Ivan Martinovic, Paul Pichota, Matthias Wilhelm, F...
DKE
2007
95views more  DKE 2007»
14 years 9 months ago
Strategies for improving the modeling and interpretability of Bayesian networks
One of the main factors for the knowledge discovery success is related to the comprehensibility of the patterns discovered by applying data mining techniques. Amongst which we can...
Ádamo L. de Santana, Carlos Renato Lisboa F...
FCCM
2008
IEEE
165views VLSI» more  FCCM 2008»
15 years 4 months ago
Performance Analysis with High-Level Languages for High-Performance Reconfigurable Computing
High-Level Languages (HLLs) for FPGAs (FieldProgrammable Gate Arrays) facilitate the use of reconfigurable computing resources for application developers by using familiar, higher...
John Curreri, Seth Koehler, Brian Holland, Alan D....