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VLSID
2008
IEEE
138views VLSI» more  VLSID 2008»
16 years 6 months ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
JAL
2008
89views more  JAL 2008»
15 years 6 months ago
Experimenting with parallelism for the instantiation of ASP programs
Abstract. In the last few years, the microprocessors technologies have been definitely moving to multi-core architectures, in order to improve performances as well as reduce power ...
Francesco Calimeri, Simona Perri, Francesco Ricca
IJSN
2007
106views more  IJSN 2007»
15 years 6 months ago
Hash-AV: fast virus signature scanning by cache-resident filters
Abstract— Fast virus scanning is becoming increasingly important in today’s Internet. While Moore’s law continues to double CPU cycle speed, virus scanning applications fail ...
Ozgun Erdogan, Pei Cao
IPPS
2006
IEEE
16 years 7 days ago
Dual-layered file cache on cc-NUMA system
CC-NUMA is a widely adopted and deployed architecture of high performance computers. These machines are attractive for their transparent access to local and remote memory. However...
Zhou Yingchao, Meng Dan, Ma Jie
JCDL
2011
ACM
301views Education» more  JCDL 2011»
14 years 9 months ago
Archiving the web using page changes patterns: a case study
A pattern is a model or a template used to summarize and describe the behavior (or the trend) of a data having generally some recurrent events. Patterns have received a considerab...
Myriam Ben Saad, Stéphane Gançarski