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DSD
2007
IEEE
120views Hardware» more  DSD 2007»
15 years 4 months ago
Latency Minimization for Synchronous Data Flow Graphs
Synchronous Data Flow Graphs (SDFGs) are a very useful means for modeling and analyzing streaming applications. Some performance indicators, such as throughput, have been studied b...
Amir Hossein Ghamarian, Sander Stuijk, Twan Basten...
MLMI
2005
Springer
15 years 3 months ago
Improving the Performance of Acoustic Event Classification by Selecting and Combining Information Sources Using the Fuzzy Integr
Acoustic events produced in meeting-room-like environments may carry information useful for perceptually aware interfaces. In this paper, we focus on the problem of combining diffe...
Andrey Temko, Dusan Macho, Climent Nadeu
WISE
2002
Springer
15 years 2 months ago
Log Mining to Improve the Performance of Site Search
Despite of the popularity of global search engines, people still suffer from low accuracy of site search. The primary reason lies in the difference of link structures and data sca...
Gui-Rong Xue, Hua-Jun Zeng, Zheng Chen, Wei-Ying M...
TVLSI
2010
14 years 4 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
FPL
2006
Springer
125views Hardware» more  FPL 2006»
15 years 1 months ago
Application-Specific Memory Interleaving for FPGA-Based Grid Computations: A General Design Technique
Many compute-intensive applications generate single result values by accessing clusters of nearby points in grids of one, two, or more dimensions. Often, the performance of FGPA i...
Tom Van Court, Martin C. Herbordt