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PLDI
2004
ACM
15 years 3 months ago
Min-cut program decomposition for thread-level speculation
With billion-transistor chips on the horizon, single-chip multiprocessors (CMPs) are likely to become commodity components. Speculative CMPs use hardware to enforce dependence, al...
Troy A. Johnson, Rudolf Eigenmann, T. N. Vijaykuma...
CF
2010
ACM
15 years 2 months ago
Interval-based models for run-time DVFS orchestration in superscalar processors
We develop two simple interval-based models for dynamic superscalar processors. These models allow us to: i) predict with great accuracy performance and power consumption under va...
Georgios Keramidas, Vasileios Spiliopoulos, Stefan...
80
Voted
DATE
2009
IEEE
138views Hardware» more  DATE 2009»
15 years 4 months ago
Hardware/software co-design architecture for thermal management of chip multiprocessors
—The sustained push for performance, transistor count, and instruction level parallelism has reached a point where chip level power density issues are at the forefront of design ...
Omer Khan, Sandip Kundu
ECAI
2004
Springer
15 years 3 months ago
A Generalized Quadratic Loss for Support Vector Machines
The standard SVM formulation for binary classification is based on the Hinge loss function, where errors are considered not correlated. Due to this, local information in the featu...
Filippo Portera, Alessandro Sperduti
ISCA
2009
IEEE
143views Hardware» more  ISCA 2009»
15 years 4 months ago
Spatio-temporal memory streaming
Recent research advocates memory streaming techniques to alleviate the performance bottleneck caused by the high latencies of off-chip memory accesses. Temporal memory streaming r...
Stephen Somogyi, Thomas F. Wenisch, Anastasia Aila...