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ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
15 years 11 months ago
An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors
This paper presents a high-availability system architecture called INDRA — an INtegrated framework for Dependable and Revivable Architecture that enhances a multicore processor ...
Weidong Shi, Hsien-Hsin S. Lee, Laura Falk, Mrinmo...
ISCAS
2006
IEEE
106views Hardware» more  ISCAS 2006»
15 years 11 months ago
An efficient SNR scalability coding framework hybrid open-close loop FGS coding
Abstract—This paper presents a novel high-efficient hybrid openclose loop based fine granularity scalable (HOCFGS) coding framework supporting different decoding complexity appli...
Xiangyang Ji, Debin Zhao, Wen Gao, Jizheng Xu, Fen...
ISORC
2006
IEEE
15 years 11 months ago
Dynamically Deploying Web Services on a Grid using Dynasoar
Dynasoar is an infrastructure for dynamically deploying Web Services over a Grid or the Internet. It enables an approach to Grid computing in which distributed applications are bu...
Paul Watson, Chris Fowler, Charles Kubicek, Arijit...
132
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MICRO
2006
IEEE
74views Hardware» more  MICRO 2006»
15 years 11 months ago
Phoenix: Detecting and Recovering from Permanent Processor Design Bugs with Programmable Hardware
Although processor design verification consumes ever-increasing resources, many design defects still slip into production silicon. In a few cases, such bugs have caused expensive...
Smruti R. Sarangi, Abhishek Tiwari, Josep Torrella...
126
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ASPLOS
2006
ACM
15 years 11 months ago
Portability events: a programming model for scalable system infrastructures
Clustered Objects (COs) [1] have been proven to be an effective ion for improving scalability of systems software [2, 3]. But can we devise a programming model that would allow CO...
Chris Matthews, Yvonne Coady, Jonathan Appavoo
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