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VEE
2009
ACM
146views Virtualization» more  VEE 2009»
15 years 5 months ago
Achieving 10 Gb/s using safe and transparent network interface virtualization
: © Achieving 10 Gb/s using Safe and Transparent Network Interface Virtualization Kaushik Kumar Ram, Jose Renato Santos, Yoshio Turner, Alan L. Cox, Scott Rixner HP Laboratories H...
Kaushik Kumar Ram, Jose Renato Santos, Yoshio Turn...
MICRO
2009
IEEE
132views Hardware» more  MICRO 2009»
15 years 5 months ago
EazyHTM: eager-lazy hardware transactional memory
Transactional Memory aims to provide a programming model that makes parallel programming easier. Hardware implementations of transactional memory (HTM) suffer from fewer overhead...
Sasa Tomic, Cristian Perfumo, Chinmay Eishan Kulka...
MICRO
2009
IEEE
168views Hardware» more  MICRO 2009»
15 years 5 months ago
Ordering decoupled metadata accesses in multiprocessors
Hardware support for dynamic analysis can minimize the performance overhead of useful applications such as security checks, debugging, and profiling. To eliminate implementation ...
Hari Kannan
CIVR
2009
Springer
229views Image Analysis» more  CIVR 2009»
15 years 5 months ago
A human-machine collaborative approach to tracking human movement in multi-camera video
Although the availability of large video corpora are on the rise, the value of these datasets remain largely untapped due to the difficulty of analyzing their contents. Automatic ...
Philip DeCamp, Deb Roy
FSTTCS
2009
Springer
15 years 5 months ago
Kernels for Feedback Arc Set In Tournaments
A tournament T = (V, A) is a directed graph in which there is exactly one arc between every pair of distinct vertices. Given a digraph on n vertices and an integer parameter k, th...
Stéphane Bessy, Fedor V. Fomin, Serge Gaspe...
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