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CHES
2006
Springer
146views Cryptology» more  CHES 2006»
13 years 10 months ago
Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits
This paper presents a Path Swapping (PS) method which enables to enhance the security of Quasi Delay Insensitive Asynchronous Circuits against Power Analysis (PA) attack. This appr...
G. Fraidy Bouesse, Gilles Sicard, Marc Renaudin
CIDR
2003
147views Algorithms» more  CIDR 2003»
13 years 7 months ago
Sorting And Indexing With Partitioned B-Trees
Partitioning within a B-tree, based on an artificial leading key column and combined with online reorganization, can be exploited during external merge sort for accurate deep read...
Goetz Graefe
ICCD
2004
IEEE
112views Hardware» more  ICCD 2004»
14 years 3 months ago
Combined Channel Segmentation and Buffer Insertion for Routability and Performance Improvement of Field
In this paper, we propose a combined channel segmentation and buffer insertion approach, which minimizes the number of buffers inserted while satisfying the delay constraints for ...
Hu Huang, Joseph B. Bernstein, Martin Peckerar, Ji...
ICMCS
2009
IEEE
126views Multimedia» more  ICMCS 2009»
13 years 4 months ago
Sort-Merge feature selection and fusion methods for classification of unstructured video
We explore the problem of rapid automatic semantic tagging of video frames of unstructured (unedited) videos. We apply the Sort-Merge algorithm for feature selection on a large (&...
Mitchell J. Morris, John R. Kender
PODC
1997
ACM
13 years 10 months ago
Leap Forward Virtual Clock: A New Fair Queuing Scheme with Guaranteed Delays and Throughput Fairness
We describe an ejjicient fair queuing scheme, Leap Forward Virtual Clock, that provides end-to-end delay bounds simdar to WFQ, along with throughput fairness. Our scheme can be im...
Subhash Suri, George Varghese, Girish P. Chandranm...