587 search results - page 45 / 118 » Improving the Java memory model using CRF |
125
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QEST
2007
IEEE
15 years 8 months ago
2007
IEEE
Previous studies have shown that buffering packets in DRAM is a performance bottleneck. In order to understand the impediments in accessing the DRAM, we developed a detailed Petri...
125
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ECAI
2004
Springer
15 years 7 months ago
2004
Springer
Model-based diagnosis applied to computer programs has been studied for several years. Although there are still weaknesses in the used models, especially on dealing with dynamic da...
153
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IPPS
2005
IEEE
15 years 7 months ago
2005
IEEE
This paper presents a compiler methodology for memoryaware mapping on 2-Dimensional coarse-grained reconfigurable architectures that aims in improving the mapped applications’ p...
109
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IJPP
2011
14 years 8 months ago
2011
Data-parallel accelerator devices such as Graphical Processing Units (GPUs) are providing dramatic performance improvements over even multicore CPUs for lattice-oriented applicatio...
111
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GLVLSI
2006
IEEE
15 years 8 months ago
2006
IEEE
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...