87 search results - page 7 / 18 » Improving the Memory Bandwidth Utilization Using Loop Transf... |
148
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ISCA
2008
IEEE
15 years 11 months ago
2008
IEEE
Efficiently utilizing off-chip DRAM bandwidth is a critical issue in designing cost-effective, high-performance chip multiprocessors (CMPs). Conventional memory controllers deli...
127
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EUROPAR
2004
Springer
15 years 10 months ago
2004
Springer
This paper describes a monitoring environment that enables the analysis of memory access behavior of applications in a selective way with a potentially very high degree of detail. ...
152
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HPCA
2002
IEEE
15 years 9 months ago
2002
IEEE
Configurations of contemporary DRAM memory systems become increasingly complex. A recent study [5] shows that application performance is highly sensitive to choices of configura...
139
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DATE
2003
IEEE
15 years 10 months ago
2003
IEEE
The widening gap between processor and memory speeds renders data locality optimization a very important issue in data-intensive embedded applications. Throughout the years hardwa...
162
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IWMM
2010
Springer
15 years 9 months ago
2010
Springer
With the availability of chip multiprocessor (CMP) and simultaneous multithreading (SMT) machines, extracting thread level parallelism from a sequential program has become crucial...