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» Improving the Performance of GALS-Based NoCs in the Presence...
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NOCS
2010
IEEE
13 years 4 months ago
Improving the Performance of GALS-Based NoCs in the Presence of Process Variation
Carles Hernandez, Antoni Roca, Federico Silla, Jos...
DAC
2004
ACM
13 years 10 months ago
A methodology to improve timing yield in the presence of process variations
The ability to control the variations in IC fabrication process is rapidly diminishing as feature sizes continue towards the sub-100 nm regime. As a result, there is an increasing...
Sreeja Raj, Sarma B. K. Vrudhula, Janet Meiling Wa...
ASPDAC
2007
ACM
98views Hardware» more  ASPDAC 2007»
13 years 8 months ago
A Software Technique to Improve Yield of Processor Chips in Presence of Ultra-Leaky SRAM Cells Caused by Process Variation
- Exceptionally leaky transistors are increasingly more frequent in nano-scale technologies due to lower threshold voltage and its increased variation. Such leaky transistors may e...
Maziar Goudarzi, Tohru Ishihara, Hiroto Yasuura
TCAD
2008
100views more  TCAD 2008»
13 years 6 months ago
Robust Clock Tree Routing in the Presence of Process Variations
Abstract--Advances in very large-scale integration technology make clock skew more susceptible to process variations. Notwithstanding efficient exact zero-skew algorithms, clock sk...
Uday Padmanabhan, Janet Meiling Wang, Jiang Hu
MICRO
2008
IEEE
142views Hardware» more  MICRO 2008»
14 years 20 days ago
NBTI tolerant microarchitecture design in the presence of process variation
—Negative bias temperature instability (NBTI), which reduces the lifetime of PMOS transistors, is becoming a growing reliability concern for sub-micrometer CMOS technologies. Par...
Xin Fu, Tao Li, José A. B. Fortes