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107
Voted
ISCA
2008
IEEE
148views Hardware» more  ISCA 2008»
15 years 7 months ago
Atomic Vector Operations on Chip Multiprocessors
The current trend is for processors to deliver dramatic improvements in parallel performance while only modestly improving serial performance. Parallel performance is harvested th...
Sanjeev Kumar, Daehyun Kim, Mikhail Smelyanskiy, Y...
94
Voted
DATE
2003
IEEE
124views Hardware» more  DATE 2003»
15 years 5 months ago
Hierarchical Global Floorplacement Using Simulated Annealing and Network Flow Area Migration
– Floorplanning large designs with many hard macros and IP blocks of various sizes is becoming an increasingly important and challenging problem. This paper presents a global flo...
Wonjoon Choi, Kia Bazargan
95
Voted
IPPS
1998
IEEE
15 years 4 months ago
Scheduling with Communication Delays and Data Routing in Message Passing Architectures
This work deals with the scheduling problem of a directed acyclic graph with interprocessor communication delays. The objective is to minimize the makespan, taking into account the...
Aziz Moukrim, Alain Quilliot
CF
2010
ACM
15 years 5 months ago
Variant-based competitive parallel execution of sequential programs
Competitive parallel execution (CPE) is a simple yet attractive technique to improve the performance of sequential programs on multi-core and multi-processor systems. A sequential...
Oliver Trachsel, Thomas R. Gross
ISSTA
2010
ACM
15 years 4 months ago
On test repair using symbolic execution
When developers change a program, regression tests can fail not only due to faults in the program but also due to outof-date test code that does not reflect the desired behavior ...
Brett Daniel, Tihomir Gvero, Darko Marinov