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DATE
2005
IEEE
154views Hardware» more  DATE 2005»
15 years 4 months ago
Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit
We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and method...
Paul Muller, Armin Tajalli, Seyed Mojtaba Atarodi,...
FPT
2005
IEEE
98views Hardware» more  FPT 2005»
15 years 4 months ago
Secure Partial Reconfiguration of FPGAs
SRAM FPGAs are vulnerable to security breaches such as bitstream cloning, reverse-engineering, and tampering. Bitstream encryption and authentication are two most effective and pr...
Amir Sheikh Zeineddini, Kris Gaj
ICDCSW
2005
IEEE
15 years 4 months ago
Adding Context Information to Digital Photos
In a user centered design process, we investigate what context information may be used to augment digital photos with additional meta information. We describe our initial findings...
Paul Holleis, Matthias Kranz, Marion Gall, Albrech...
ICSM
2005
IEEE
15 years 4 months ago
Isolating Idiomatic Crosscutting Concerns
This paper reports on our experience in automatically migrating the crosscutting concerns of a large-scale software system, written in C, to an aspect-oriented implementation. We ...
Magiel Bruntink, Arie van Deursen, Tom Tourw&eacut...
ASPDAC
2005
ACM
65views Hardware» more  ASPDAC 2005»
15 years 4 months ago
Library cell layout with Alt-PSM compliance and composability
The sustained miniaturization of VLSI feature size presents great challenges to sub-wavelength photolithography and requests usage of many Resolution Enhancement Techniques (RET)....
Ke Cao, Puneet Dhawan, Jiang Hu