37 search results - page 1 / 8 » Improving the performance and power efficiency of shared hel... |
99
Voted
CASES
2006
ACM
15 years 4 months ago
2006
ACM
Technology scaling trends have forced designers to consider alternatives to deeply pipelining aggressive cores with large amounts of performance accelerating hardware. One alterna...
FPL
2008
Springer
15 years 2 months ago
2008
Springer
This paper investigates reconfigurable architectures suitable for chip multiprocessors (CMPs). Prior research has established that augmenting a conventional processor with reconfi...
105
Voted
PPOPP
2009
ACM
16 years 1 months ago
2009
ACM
Data prefetching has been widely used in the past as a technique for hiding memory access latencies. However, data prefetching in multi-threaded applications running on chip multi...
103
Voted
PDP
2010
IEEE
15 years 5 months ago
2010
IEEE
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
110
Voted
HPCA
2009
IEEE
16 years 1 months ago
2009
IEEE
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...