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» In-System Silicon Validation and Debug
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DAC
2006
ACM
15 years 3 months ago
Visibility enhancement for silicon debug
Several emerging Design-for-Debug (DFD) methodologies are addressing silicon debug by making internal signal values and other data observable. Most of these methodologies require ...
Yu-Chin Hsu, Fur-Shing Tsai, Wells Jong, Ying-Tsai...
DATE
2008
IEEE
121views Hardware» more  DATE 2008»
15 years 3 months ago
On Automated Trigger Event Generation in Post-Silicon Validation
When searching for functional bugs in silicon, debug data is acquired after a trigger event occurs. A trigger event can be configured at run-time using a set of control registers...
Ho Fai Ko, Nicola Nicolici
DATE
2009
IEEE
110views Hardware» more  DATE 2009»
15 years 4 months ago
Trace signal selection for visibility enhancement in post-silicon validation
Today’s complex integrated circuit designs increasingly rely on post-silicon validation to eliminate bugs that escape from presilicon verification. One effective silicon debug ...
Xiao Liu, Qiang Xu
DAC
2009
ACM
15 years 10 months ago
Interconnection fabric design for tracing signals in post-silicon validation
Post-silicon validation has become an essential step in the design flow of today's complex integrated circuits. One effective technique that provides real-time visibility to ...
Xiao Liu, Qiang Xu
ETS
2010
IEEE
130views Hardware» more  ETS 2010»
14 years 10 months ago
A distributed architecture to check global properties for post-silicon debug
Post-silicon validation and debug, or ensuring that software executes correctly on the silicon of a multi-processor system-on-chip (MPSOC) is complicated, as it involves checking g...
Erik Larsson, Bart Vermeulen, Kees Goossens