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ISCA
2011
IEEE
269views Hardware» more  ISCA 2011»
14 years 6 months ago
Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security
High assurance systems used in avionics, medical implants, and cryptographic devices often rely on a small trusted base of hardware and software to manage the rest of the system. ...
Mohit Tiwari, Jason Oberg, Xun Li 0001, Jonathan V...
CCS
2007
ACM
15 years 9 months ago
Panorama: capturing system-wide information flow for malware detection and analysis
Malicious programs spy on users’ behavior and compromise their privacy. Even software from reputable vendors, such as Google Desktop and Sony DRM media player, may perform undes...
Heng Yin, Dawn Xiaodong Song, Manuel Egele, Christ...
CCS
2009
ACM
16 years 3 months ago
Logging key assurance indicators in business processes
Management of a modern enterprise is based on the assumption that executive reports of lower-layer management are faithful to what is actually happening in the field. As some well...
Fabio Massacci, Gene Tsudik, Artsiom Yautsiukhin
ICS
2003
Tsinghua U.
15 years 8 months ago
AEGIS: architecture for tamper-evident and tamper-resistant processing
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, M...
EUROPAR
2011
Springer
14 years 2 months ago
A Bit-Compatible Parallelization for ILU(k) Preconditioning
Abstract. ILU(k) is a commonly used preconditioner for iterative linear solvers for sparse, non-symmetric systems. It is often preferred for the sake of its stability. We present T...
Xin Dong 0004, Gene Cooperman