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» Incompleteness of states w.r.t. traces in model checking
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ICALP
2001
Springer
15 years 4 months ago
Symbolic Trace Analysis of Cryptographic Protocols
A cryptographic protocol can be described as a system of concurrent processes, and analysis of the traces generated by this system can be used to verify authentication and secrecy ...
Michele Boreale
IPPS
2003
IEEE
15 years 5 months ago
So Many States, So Little Time: Verifying Memory Coherence in the Cray X1
This paper investigates a complexity-effective technique for verifying a highly distributed directory-based cache coherence protocol. We develop a novel approach called “witnes...
Dennis Abts, Steve Scott, David J. Lilja
ATVA
2007
Springer
226views Hardware» more  ATVA 2007»
15 years 6 months ago
Bounded Model Checking of Analog and Mixed-Signal Circuits Using an SMT Solver
This paper presents a bounded model checking algorithm for the verification of analog and mixed-signal (AMS) circuits using a satisfiability modulo theories (SMT) solver. The sys...
David Walter, Scott Little, Chris J. Myers
CONCUR
2006
Springer
15 years 1 months ago
Model Checking Quantified Computation Tree Logic
Propositional temporal logic is not suitable for expressing properties on the evolution of dynamically allocated entities over time. In particular, it is not possible to trace such...
Arend Rensink
SIGSOFT
2007
ACM
16 years 15 days ago
State space exploration using feedback constraint generation and Monte-Carlo sampling
The systematic exploration of the space of all the behaviours of a software system forms the basis of numerous approaches to verification. However, existing approaches face many c...
Sriram Sankaranarayanan, Richard M. Chang, Guofei ...