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VTS
2003
IEEE
88views Hardware» more  VTS 2003»
15 years 3 months ago
Use of Multiple IDDQ Test Metrics for Outlier Identification
With increasing circuit complexity and reliability requirements, screening outlier chips is an increasingly important test challenge. This is especially true for IDDQ test due to ...
Sagar S. Sabade, D. M. H. Walker
DATE
2000
IEEE
132views Hardware» more  DATE 2000»
15 years 2 months ago
Automatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience
In current microprocessors and systems, an increasingly high silicon portion is derived through automatic synthesis, with designers working exclusively at the RT-level, and design...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
IPPS
1998
IEEE
15 years 2 months ago
Sharing Random Bits with No Process Coordination
We present a method by which any polynomial-time randomized distributed algorithm is transformed in such way that each participating process needs only polylog local random bits a...
Marius Zimand
ISLPED
1997
ACM
114views Hardware» more  ISLPED 1997»
15 years 2 months ago
Analysis of power consumption in memory hierarchies
In this paper, we note and analyze a key trade-off: as the complexity of caches increases (higher set-associativity, larger block size, and larger overall size), the power consume...
Patrick Hicks, Matthew Walnock, Robert Michael Owe...
ECIS
2004
14 years 11 months ago
Developments in WIS development
This paper presents findings from a longitudinal field study of web-design undertaken in a webdevelopment company. The main contribution is a comparison of some early predictions ...
Peter H. Carstensen