Sciweavers

661 search results - page 120 / 133
» Increasing Processor Performance by Implementing Deeper Pipe...
Sort
View
ASPLOS
2006
ACM
15 years 5 months ago
Architectural support for software-based protection
Control-Flow Integrity (CFI) is a property that guarantees program control flow cannot be subverted by a malicious adversary, even if the adversary has complete control of data m...
Mihai Budiu, Úlfar Erlingsson, Martí...
PDP
2010
IEEE
15 years 4 months ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...
BMCBI
2010
116views more  BMCBI 2010»
14 years 11 months ago
permGPU: Using graphics processing units in RNA microarray association studies
Background: Many analyses of microarray association studies involve permutation, bootstrap resampling and crossvalidation, that are ideally formulated as embarrassingly parallel c...
Ivo D. Shterev, Sin-Ho Jung, Stephen L. George, Ko...
ISCA
2007
IEEE
146views Hardware» more  ISCA 2007»
15 years 6 months ago
Hardware atomicity for reliable software speculation
Speculative compiler optimizations are effective in improving both single-thread performance and reducing power consumption, but their implementation introduces significant compl...
Naveen Neelakantam, Ravi Rajwar, Suresh Srinivas, ...
DAC
2004
ACM
16 years 19 days ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan