Sciweavers

661 search results - page 45 / 133
» Increasing Processor Performance by Implementing Deeper Pipe...
Sort
View
BILDMED
2008
129views Algorithms» more  BILDMED 2008»
15 years 1 months ago
Evaluating the Performance of Processing Medical Volume Data on Graphics Hardware
With the broad availability and increasing performance of commodity graphics processors (GPU), non-graphical applications have become an active field of research. However, leveragi...
Matthias Raspe, Guido Lorenz, Stefan Müller 0...
SBACPAD
2008
IEEE
126views Hardware» more  SBACPAD 2008»
15 years 6 months ago
A Software Transactional Memory System for an Asymmetric Processor Architecture
Due to the advent of multi-core processors and the consequent need for better concurrent programming abstractions, new synchronization paradigms have emerged. A promising one, kno...
Felipe Goldstein, Alexandro Baldassin, Paulo Cento...
ACMMSP
2004
ACM
125views Hardware» more  ACMMSP 2004»
15 years 5 months ago
Improving trace cache hit rates using the sliding window fill mechanism and fill select table
As superscalar processors become increasingly wide, it is inevitable that the large set of instructions to be fetched every cycle will span multiple noncontiguous basic blocks. Th...
Muhammad Shaaban, Edward Mulrane
DATE
2006
IEEE
113views Hardware» more  DATE 2006»
15 years 5 months ago
Automatic ADL-based operand isolation for embedded processors
Cutting-edge applications of future embedded systems demand highest processor performance with low power consumption to get acceptable battery-life times. Therefore, low power opt...
Anupam Chattopadhyay, B. Geukes, David Kammler, Er...
101
Voted
DSN
2008
IEEE
15 years 6 months ago
Combined circuit and microarchitecture techniques for effective soft error robustness in SMT processors
As semiconductor technology scales, reliability is becoming an increasingly crucial challenge in microprocessor design. The rSRAM and voltage scaling are two promising circuit-lev...
Xin Fu, Tao Li, José A. B. Fortes