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EUROMICRO
1999
IEEE
15 years 4 months ago
Delft-Java Dynamic Translation
This paper describes the DELFT-JAVA processor and the mechanisms required to dynamically translate JVM instructions into DELFT-JAVA instructions. Using a form of hardware register...
C. John Glossner, Stamatis Vassiliadis
CONCURRENCY
1998
151views more  CONCURRENCY 1998»
14 years 11 months ago
A new parallel matrix multiplication algorithm on distributed-memory concurrent computers
We present a new fast and scalable matrix multiplication algorithm, called DIMMA Distribution-Independent Matrix Multiplication Algorithm, for block cyclic data distribution on ...
Jaeyoung Choi
APCSAC
2001
IEEE
15 years 3 months ago
Exploiting Java Instruction/Thread Level Parallelism with Horizontal Multithreading
Java bytecodes can be executed with the following three methods: a Java interpretor running on a particular machine interprets bytecodes; a Just-In-Time (JIT) compiler translates ...
Kenji Watanabe, Wanming Chu, Yamin Li
ICCAD
2006
IEEE
177views Hardware» more  ICCAD 2006»
15 years 8 months ago
Application-specific customization of parameterized FPGA soft-core processors
Soft-core microprocessors mapped onto field-programmable gate arrays (FPGAs) represent an increasingly common embedded software implementation option. Modern FPGA soft-cores are p...
David Sheldon, Rakesh Kumar, Roman L. Lysecky, Fra...
DATE
2000
IEEE
83views Hardware» more  DATE 2000»
15 years 4 months ago
Wave Steered FSMs
In this paper we address the problem of designing very high throughput finite state machines (FSMs). The presence of loops in sequential circuits prevents a straightforward and g...
Luca Macchiarulo, Shih-Ming Shu, Malgorzata Marek-...