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RTAS
1998
IEEE
15 years 4 months ago
Managing Memory Requirements in the Synthesis of Real-Time Systems from Processing Graphs
In the past, environmental restrictions on size, weight, and power consumption have severely limited both the processing and storage capacity of embedded signal processing systems...
Steve Goddard, Kevin Jeffay
IPPS
2009
IEEE
15 years 6 months ago
CellMR: A framework for supporting mapreduce on asymmetric cell-based clusters
The use of asymmetric multi-core processors with onchip computational accelerators is becoming common in a variety of environments ranging from scientific computing to enterprise...
M. Mustafa Rafique, Benjamin Rose, Ali Raza Butt, ...
IEEEPACT
2006
IEEE
15 years 6 months ago
Whole-program optimization of global variable layout
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
Nathaniel McIntosh, Sandya Mannarswamy, Robert Hun...
MICRO
2006
IEEE
162views Hardware» more  MICRO 2006»
15 years 6 months ago
Adaptive Caches: Effective Shaping of Cache Behavior to Workloads
We present and evaluate the idea of adaptive processor cache management. Specifically, we describe a novel and general scheme by which we can combine any two cache management alg...
Ranjith Subramanian, Yannis Smaragdakis, Gabriel H...
ANCS
2006
ACM
15 years 5 months ago
Design of a web switch in a reconfigurable platform
The increase of the web traffic has created the need for web switches that are able to balance the traffic to the server farms based on their contents (e.g. layer 7 switching). In...
Christoforos Kachris, Stamatis Vassiliadis