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SCOPES
2004
Springer
15 years 3 months ago
Compact Procedural Implementation in DSP Software Synthesis Through Recursive Graph Decomposition
Abstract. Synthesis of digital signal processing (DSP) software from dataflow-based formal models is an effective approach for tackling the complexity of modern DSP applications. I...
Ming-Yung Ko, Praveen K. Murthy, Shuvra S. Bhattac...
100
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CCGRID
2006
IEEE
15 years 2 months ago
IPMI-based Efficient Notification Framework for Large Scale Cluster Computing
The demand for an efficient fault tolerance system has led to the development of complex monitoring infrastructure, which in turn has created an overwhelming task of data and even...
Chokchai Leangsuksun, Tirumala Rao, Anand Tikoteka...
ERSA
2006
70views Hardware» more  ERSA 2006»
14 years 11 months ago
Differential Reconfiguration Architecture suitable for a Holographic Memory
Optically Reconfigurable Gate Arrays (ORGAs), by exploiting the large storage capacity of holographic memory, offer the possibility of providing a virtual gate count that is much l...
Minoru Watanabe, Mototsugu Miyano, Fuminori Kobaya...
TMC
2010
161views more  TMC 2010»
14 years 8 months ago
Schedule Adaptation of Low-Power-Listening Protocols for Wireless Sensor Networks
—Many recent advances in MAC protocols for wireless sensor networks have been proposed to reduce idle listening, an energy wasteful state of the radio. Low-Power-Listening (LPL) ...
Christophe J. Merlin, Wendi B. Heinzelman
HPCA
2009
IEEE
15 years 11 months ago
Prediction router: Yet another low latency on-chip router architecture
Network-on-Chips (NoCs) are quite latency sensitive, since their communication latency strongly affects the application performance on recent many-core architectures. To reduce th...
Hiroki Matsutani, Michihiro Koibuchi, Hideharu Ama...