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DATE
2009
IEEE
202views Hardware» more  DATE 2009»
15 years 5 months ago
Design as you see FIT: System-level soft error analysis of sequential circuits
Soft errors in combinational and sequential elements of digital circuits are an increasing concern as a result of technology scaling. Several techniques for gate and latch hardeni...
Daniel Holcomb, Wenchao Li, Sanjit A. Seshia
101
Voted
DSN
2009
IEEE
15 years 5 months ago
Decoupling Dynamic Information Flow Tracking with a dedicated coprocessor
Dynamic Information Flow Tracking (DIFT) is a promising security technique. With hardware support, DIFT prevents a wide range of attacks on vulnerable software with minimal perfor...
Hari Kannan, Michael Dalton, Christos Kozyrakis
TCAD
2008
92views more  TCAD 2008»
14 years 10 months ago
IP Watermarking Using Incremental Technology Mapping at Logic Synthesis Level
Abstract--This paper proposes an adaptive watermarking technique by modulating some closed cones in an originally optimized logic network (master design) for technology mapping. Th...
Aijiao Cui, Chip-Hong Chang, Sofiène Tahar
RTAS
2010
IEEE
14 years 9 months ago
Physicalnet: A Generic Framework for Managing and Programming Across Pervasive Computing Networks
This paper describes the design and implementation of a pervasive computing framework, named Physicalnet. Essentially, Physicalnet is a generic paradigm for managing and programmi...
Pascal Vicaire, Zhiheng Xie, Enamul Hoque, John A....
SIGCOMM
2005
ACM
15 years 4 months ago
ExOR: opportunistic multi-hop routing for wireless networks
This paper describes ExOR, an integrated routing and MAC protocol that increases the throughput of large unicast transfers in multi-hop wireless networks. ExOR chooses each hop of...
Sanjit Biswas, Robert Morris