Sciweavers

152 search results - page 21 / 31
» Incremental Timing Budget Management in Programmable Systems
Sort
View
MAM
2006
125views more  MAM 2006»
14 years 11 months ago
Stream computations organized for reconfigurable execution
Reconfigurable systems can offer the high spatial parallelism and fine-grained, bit-level resource control traditionally associated with hardware implementations, along with the f...
André DeHon, Yury Markovsky, Eylon Caspi, M...
ASPLOS
2006
ACM
15 years 5 months ago
Software-based instruction caching for embedded processors
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
Jason E. Miller, Anant Agarwal
DSD
2010
IEEE
153views Hardware» more  DSD 2010»
14 years 12 months ago
Simulation of High-Performance Memory Allocators
—Current general-purpose memory allocators do not provide sufficient speed or flexibility for modern highperformance applications. To optimize metrics like performance, memory us...
José Luis Risco-Martín, José ...
SAC
2006
ACM
15 years 5 months ago
Hardware/software 2D-3D backprojection on a SoPC platform
The reduction of image reconstruction time is needed to spread the use of PET for research and routine clinical practice. In this purpose, this article presents a hardware/softwar...
Nicolas Gac, Stéphane Mancini, Michel Desvi...
CIKM
2011
Springer
13 years 11 months ago
MTopS: scalable processing of continuous top-k multi-query workloads
A continuous top-k query retrieves the k most preferred objects in a data stream according to a given preference function. These queries are important for a broad spectrum of appl...
Avani Shastri, Di Yang, Elke A. Rundensteiner, Mat...