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» Incremental formal design verification
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DAC
2006
ACM
15 years 10 months ago
Guiding simulation with increasingly refined abstract traces
Traces Kuntal Nanshi, Fabio Somenzi University of Colorado at Boulder ne abstraction refinement and simulation to provide a more efficient approach to checking invariant properti...
Kuntal Nanshi, Fabio Somenzi
VLSID
2002
IEEE
152views VLSI» more  VLSID 2002»
15 years 10 months ago
Verification of an Industrial CC-NUMA Server
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
Rajarshi Mukherjee, Yozo Nakayama, Toshiya Mima
IJAOSE
2008
97views more  IJAOSE 2008»
14 years 9 months ago
Formal driven prototyping approach for multiagent systems
: Even if Multiagent Systems (MASs) are recognised as an appealing paradigm for designing many computer systems ranging from complex distributed systems to intelligent software app...
Vincent Hilaire, Pablo Gruer, Abderrafiaa Koukam, ...
ICSE
2008
IEEE-ACM
15 years 10 months ago
Calysto: scalable and precise extended static checking
Automatically detecting bugs in programs has been a long-held goal in software engineering. Many techniques exist, trading-off varying levels of automation, thoroughness of covera...
Domagoj Babic, Alan J. Hu
ICFEM
1997
Springer
15 years 1 months ago
Formally Specifying and Verifying Real-Time Systems
A real-time computer system is a system that must perform its functions within specified time bounds. These systems are generally characterized by complex interactions with the en...
Richard A. Kemmerer