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» Incremental formal design verification
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ICCD
2007
IEEE
140views Hardware» more  ICCD 2007»
15 years 1 months ago
Continual hashing for efficient fine-grain state inconsistency detection
Transaction-level modeling (TLM) allows a designer to save functional verification effort during the modular refinement of an SoC by reusing the prior implementation of a module a...
Jae W. Lee, Myron King, Krste Asanovic
CACM
2008
121views more  CACM 2008»
14 years 8 months ago
Polaris: a system for query, analysis, and visualization of multidimensional databases
During the last decade, multidimensional databases have become common in the business and scientific worlds. Analysis places significant demands on the interfaces to these databas...
Chris Stolte, Diane Tang, Pat Hanrahan
EUROMICRO
1996
IEEE
15 years 1 months ago
A Graph Rewriting Approach for Transformational Design of Digital Systems
Transformational design integrates design and verification. It combines "correctness by construciion" and design creativity by the use ofpre-proven behaviour preserving ...
Corrie Huijs
RE
2008
Springer
14 years 9 months ago
Requirements Capture with RCAT
NASA spends millions designing and building spacecraft for its missions. The dependence on software is growing as spacecraft become more complex. With the increasing dependence on...
Margaret H. Smith, Klaus Havelund
CAV
2005
Springer
127views Hardware» more  CAV 2005»
15 years 3 months ago
Incremental and Complete Bounded Model Checking for Full PLTL
Bounded model checking is an efficient method for finding bugs in system designs. The major drawback of the basic method is that it cannot prove properties, only disprove them. R...
Keijo Heljanko, Tommi A. Junttila, Timo Latvala