452 search results - page 44 / 91 » Incremental formal design verification |
DAC
1994
ACM
15 years 1 months ago
1994
ACM
This paper describes a diagnosis technique for locating design errors in circuit implementations which do not match their functional specification. The method efficiently propagat...
ASE
2008
14 years 9 months ago
2008
Model checkers were originally developed to support the formal verification of high-level design models of distributed system designs. Over the years, they have become unmatched in...
ICSE
2005
IEEE-ACM
15 years 9 months ago
2005
IEEE-ACM
We demonstrate a tool to incrementally synchronize an Acme architectural model described in the Acme Architectural Description Language (ADL) with an implementation in ArchJava, a...
DAC
2006
ACM
15 years 10 months ago
2006
ACM
A simple protocol for latency-insensitive design is presented. The main features of the protocol are the efficient implementation of elastic communication channels and the automat...
FUIN
2007
14 years 9 months ago
2007
We present in this paper the algorithm which performs the translation of MSC’2000 diagrams into Petri net modulo strong bisimulation. The correctness of this algorithm is justifi...