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» Incremental formal design verification
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DAC
2009
ACM
15 years 10 months ago
Efficient SAT solving for non-clausal formulas using DPLL, graphs, and watched cuts
Boolean satisfiability (SAT) solvers are used heavily in hardware and software verification tools for checking satisfiability of Boolean formulas. Most state-of-the-art SAT solver...
Himanshu Jain, Edmund M. Clarke
DAC
2007
ACM
15 years 1 months ago
A Framework for the Validation of Processor Architecture Compliance
We present a framework for validating the compliance of a design with a given architecture. Our approach is centered on the concept of misinterpretations. These include missing be...
Allon Adir, Sigal Asaf, Laurent Fournier, Itai Jae...
ISOLA
2010
Springer
14 years 8 months ago
An Interface Algebra for Estimating Worst-Case Traversal Times in Component Networks
Abstract. Interface-based design relies on the idea that different components of a system may be developed independently and a system designer can connect them together only if th...
Nikolay Stoimenov, Samarjit Chakraborty, Lothar Th...
ESORICS
2009
Springer
15 years 10 months ago
Towards a Theory of Accountability and Audit
Accountability mechanisms, which rely on after-the-fact verification, are an attractive means to enforce authorization policies. In this paper, we describe an operational model of ...
Radha Jagadeesan, Alan Jeffrey, Corin Pitcher, Jam...
ECLIPSE
2005
ACM
14 years 11 months ago
Leveraging Eclipse for integrated model-based engineering of web service compositions
In this paper we detail the design and implementation of an Eclipse plug-in for an integrated, model-based approach, to the engineering of web service compositions. The plug-in al...
Howard Foster, Sebastián Uchitel, Jeff Mage...