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» Incremental formal design verification
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ICFP
2005
ACM
15 years 9 months ago
A principled approach to operating system construction in Haskell
We describe a monadic interface to low-level hardware features that is a suitable basis for building operating systems in Haskell. The interface includes primitives for controllin...
Thomas Hallgren, Mark P. Jones, Rebekah Leslie, An...
ARTS
1997
Springer
15 years 1 months ago
The Verus Language: Representing Time Efficiently with BDDs
There have been significant advances on formal methods to verify complex systems recently. Nevertheless, these methods have not yet been accepted as a realistic alternative to the ...
Sérgio Vale Aguiar Campos, Edmund M. Clarke
FM
2008
Springer
127views Formal Methods» more  FM 2008»
14 years 11 months ago
A Schedulerless Semantics of TLM Models Written in SystemC Via Translation into LOTOS
TLM (Transaction-Level Modeling) was introduced to cope with the increasing complexity of Systems-on-Chip designs by raising the modeling level. Currently, TLM is primarily used fo...
Olivier Ponsini, Wendelin Serwe
DATE
2006
IEEE
101views Hardware» more  DATE 2006»
15 years 3 months ago
Design with race-free hardware semantics
Most hardware description languages do not enforce determinacy, meaning that they may yield races. Race conditions pose a problem for the implementation, verification, and validat...
Patrick Schaumont, Sandeep K. Shukla, Ingrid Verba...
FDL
2004
IEEE
15 years 1 months ago
A Functional Programming Framework of Heterogeneous Model of Computation for System Design
System-on-Chip (SOC) and other complex distributed hardware/software systems contain heterogeneous components such as DSPs, micro-controllers, application specific logic etc., whi...
Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shu...