193 search results - page 25 / 39 » Incremental logic rectification |
113
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MICS
2010
15 years 9 days ago
2010
Strategies specify how a wide range of exercises can be solved incrementally, such as bringing a logic proposition to disjunctive normal form, reducing a matrix, or calculating wit...
127
Voted
FPGA
2000
ACM
15 years 5 months ago
2000
ACM
In recent years the application space of reconfigurable devices has grown to include many platforms with a strong need for fault tolerance. While these systems frequently contain ...
124
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ICCAD
2004
IEEE
15 years 10 months ago
2004
IEEE
— This paper presents Hermes, a depth-optimal LUT based FPGA mapping algorithm. The presented algorithm is based on a new strategy for finding LUTs allowing to find a good LUT ...
93
Voted
ICCAD
2001
IEEE
15 years 10 months ago
2001
IEEE
Redundancy-addition-and-removal is a rewiring technique which for a given target wire wt finds a redundant alternative wire wa. Addition of wa makes wt redundant and hence removab...
132
Voted
TIME
2009
IEEE
15 years 8 months ago
2009
IEEE
—The anonymization of location based queries through the generalization of spatio-temporal information has been proposed as a privacy preserving technique. We show that the prese...