In this paper, we formulate the problem of topology constrained rectilinear block packing in layout reuse. A speci c class of rectilinear shaped blocks, ordered convex rectilinear...
This paper presents a novel power reduction method for chip multi-processors (CMPs) under real-time constraints. While the power consumption of processing units (PUs) on CMPs can ...
Today, the syntax of visual specification languages such as UML is typically defined using meta-modelling techniques. However, this kind of syntax definition has drawbacks. In par...
By exploiting properties of the joint space mass-inertia matrix of flexure jointed hexapods, a new decoupling method is proposed. The new decoupling method, through a static input...
Power dissipation is quickly becoming one of the most important limiters in nanometer IC design for leakage increases exponentially as the technology scaling down. However, power ...