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ISQED
2002
IEEE
72views Hardware» more  ISQED 2002»
15 years 10 months ago
Inductance Aware Interconnect Scaling
This paper introduces a new global-tier interconnect scaling scheme which ensures that inductance effects do not start dominating the overall interconnect performance. It is shown...
Kaustav Banerjee, Amit Mehrotra
DAC
2001
ACM
16 years 6 months ago
Analysis of On-Chip Inductance Effects using a Novel Performance Optimization Methodology for Distributed RLC Interconnects
This work presents a new and computationally efficient performance optimization technique for distributed RLC interconnects based on a rigorous delay computation scheme. The new o...
Kaustav Banerjee, Amit Mehrotra
TCAD
2002
99views more  TCAD 2002»
15 years 5 months ago
Analysis of on-chip inductance effects for distributed RLC interconnects
This paper introduces an accurate analysis of on-chip inductance effects for distributed interconnects that takes the effect of both the series resistance and the output parasitic ...
Kaustav Banerjee, Amit Mehrotra
TVLSI
2010
15 years 6 days ago
Fast Analysis of a Large-Scale Inductive Interconnect by Block-Structure-Preserved Macromodeling
To efficiently analyze the large-scale interconnect dominant circuits with inductive couplings (mutual inductances), this paper introduces a new state matrix, called VNA, to stamp ...
Hao Yu, Chunta Chu, Yiyu Shi, David Smart, Lei He,...
ICCD
2006
IEEE
94views Hardware» more  ICCD 2006»
16 years 2 months ago
Quantitative Prediction of On-chip Capacitive and Inductive Crosstalk Noise and Discussion on Wire Cross-Sectional Area Toward I
Abstract— Capacitive and inductive crosstalk noises are expected to be more serious in advanced technologies. However, capacitive and inductive crosstalk noises in the future hav...
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoy...