Sciweavers

1636 search results - page 21 / 328
» InfoPad - An Experiment in System Level Design and Integrati...
Sort
View
CODES
2005
IEEE
15 years 5 months ago
A power estimation methodology for systemC transaction level models
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
Nagu R. Dhanwada, Ing-Chao Lin, Vijay Narayanan
ACSD
2003
IEEE
159views Hardware» more  ACSD 2003»
15 years 5 months ago
Case Studies of Model Checking for Embedded System Designs
As modern embedded systems become more integrated and complex, it is crucial to be able to represent systems ple levels of abstraction, so that the design space can be effectively...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
DATE
2003
IEEE
119views Hardware» more  DATE 2003»
15 years 5 months ago
Evaluation of Applying SpecC to the Integrated Design Method of Device Driver and Device
We are investigating an integrated design method for a device driver and a device in order to efficiently develop device drivers used in embedded systems. This paper evaluates wh...
Shinya Honda, Hiroaki Takada
FPL
2004
Springer
205views Hardware» more  FPL 2004»
15 years 5 months ago
A System Level Resource Estimation Tool for FPGAs
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
Changchun Shi, James Hwang, Scott McMillan, Ann Ro...
DATE
2008
IEEE
119views Hardware» more  DATE 2008»
15 years 6 months ago
Guiding Circuit Level Fault-Tolerance Design with Statistical Methods
In the last decade, the focus of fault-tolerance methods has tended towards circuit level modifications, such as transistor resizing, and away from expensive system level redunda...
Drew C. Ness, David J. Lilja