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RTAS
2010
IEEE
14 years 10 months ago
DARTS: Techniques and Tools for Predictably Fast Memory Using Integrated Data Allocation and Real-Time Task Scheduling
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
Sangyeol Kang, Alexander G. Dean
MM
2005
ACM
157views Multimedia» more  MM 2005»
15 years 5 months ago
Chameleon: application level power management with performance isolation
In this paper, we present Chameleon—an application-level power management approach for reducing energy consumption in mobile processors. Our approach exports the entire responsi...
Xiaotao Liu, Prashant J. Shenoy, Mark D. Corner
SRDS
2005
IEEE
15 years 5 months ago
Agile Store: Experience with Quorum-Based Data Replication Techniques for Adaptive Byzantine Fault Tolerance
Quorum protocols offer several benefits when used to maintain replicated data but techniques for reducing overheads associated with them have not been explored in detail. It is d...
Lei Kong, Deepak J. Manohar, Mustaque Ahamad, Arun...
SAMOS
2007
Springer
15 years 6 months ago
Design Space Exploration of Configuration Manager for Network Processing Applications
—Current FPGAs provide a powerful platform for network processing applications. The main challenge is the exploitation of the reconfiguration to increase the performance of the s...
Christoforos Kachris, Stamatis Vassiliadis
EUROPAR
2005
Springer
15 years 5 months ago
Early Experience with Scientific Applications on the Blue Gene/L Supercomputer
Abstract. Blue Gene/L uses a large number of low power processors, together with multiple integrated interconnection networks, to build a supercomputer with low cost, space and pow...
George S. Almasi, Gyan Bhanot, Dong Chen, Maria El...