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SBCCI
2005
ACM
276views VLSI» more  SBCCI 2005»
15 years 6 months ago
Virtual channels in networks on chip: implementation and evaluation on hermes NoC
Networks on chip (NoCs) draw on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. Congesti...
Aline Mello, Leonel Tedesco, Ney Calazans, Fernand...
DATE
2003
IEEE
96views Hardware» more  DATE 2003»
15 years 6 months ago
Time Domain Multiplexed TAM: Implementation and Comparison
One of the difficult problems which core-based systemon-chip (SoC) designs face is test access. For testing the cores in a SoC, a special mechanism is required, since they are no...
Zahra Sadat Ebadi, André Ivanov
WWW
2007
ACM
16 years 1 months ago
GigaHash: scalable minimal perfect hashing for billions of urls
A minimal perfect function maps a static set of keys on to the range of integers {0,1,2, ... , - 1}. We present a scalable high performance algorithm based on random graphs for ...
Kumar Chellapilla, Anton Mityagin, Denis Xavier Ch...
SIGMOD
2012
ACM
226views Database» more  SIGMOD 2012»
13 years 3 months ago
SkewTune: mitigating skew in mapreduce applications
We present an automatic skew mitigation approach for userdefined MapReduce programs and present SkewTune, a system that implements this approach as a drop-in replacement for an e...
YongChul Kwon, Magdalena Balazinska, Bill Howe, Je...
SC
2009
ACM
15 years 8 months ago
Bridging parallel and reconfigurable computing with multilevel PGAS and SHMEM+
Reconfigurable computing (RC) systems based on FPGAs are becoming an increasingly attractive solution to building parallel systems of the future. Applications targeting such syste...
Vikas Aggarwal, Alan D. George, K. Yalamanchili, C...