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CODES
2004
IEEE
15 years 5 months ago
Multi-objective mapping for mesh-based NoC architectures
In this paper we present an approach to multi-objective exploration of the mapping space of a mesh-based network-on-chip architecture. Based on evolutionary computing techniques, ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
FPL
2006
Springer
161views Hardware» more  FPL 2006»
15 years 4 months ago
Predictive Load Balancing for Interconnected FPGAs
A Field Programmable Gate Array (FPGA), when used as a platform for implementing special-purpose computing architectures, offers the potential for increased functional parallelism...
Jason D. Bakos, Charles L. Cathey, Allen Michalski
ISORC
2008
IEEE
15 years 7 months ago
Toward Effective Multi-Capacity Resource Allocation in Distributed Real-Time and Embedded Systems
Effective resource management for distributed real-time embedded (DRE) systems is hard due to their unique characteristics, including (1) constraints in multiple resources and (2)...
Nilabja Roy, John S. Kinnebrew, Nishanth Shankaran...
ICFP
2009
ACM
16 years 1 months ago
Parallel concurrent ML
Concurrent ML (CML) is a high-level message-passing language that supports the construction of first-class synchronous abstractions called events. This mechanism has proven quite ...
John H. Reppy, Claudio V. Russo, Yingqi Xiao
TCAD
2002
146views more  TCAD 2002»
15 years 27 days ago
Static scheduling of multidomain circuits for fast functional verification
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...
Murali Kudlugi, Russell Tessier