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ICPADS
2006
IEEE
15 years 7 months ago
Destination-Based HoL Blocking Elimination
Congestion management is likely to become a critical issue in interconnection networks, as increasing power consumption and cost concerns will lead to the use of smaller networks....
T. Nachiondo, Jose Flich, José Duato
IISWC
2008
IEEE
15 years 7 months ago
STAMP: Stanford Transactional Applications for Multi-Processing
Abstract—Transactional Memory (TM) is emerging as a promising technology to simplify parallel programming. While several TM systems have been proposed in the research literature,...
Chi Cao Minh, JaeWoong Chung, Christos Kozyrakis, ...
CDES
2006
99views Hardware» more  CDES 2006»
15 years 2 months ago
Realization of Digital Fuzzy Operations Using Multi-Valued Fredkin Gates
Multi-valued Fredkin gates (MVFG) are reversible gates and they can be considered as modified version of the better known reversible gate the Fredkin gate. Reversible logic gates ...
Amin Ahsan Ali, Hafiz Md. Hasan Babu, Ahsan Raja C...
HCW
2000
IEEE
15 years 5 months ago
Fast Heterogeneous Binary Data Interchange
Dramatic increasesin availablewide-area bandwidth have driven event-basedmonitoring to new heights. Monitoring services are widely used in today's distributed laboratories, w...
Greg Eisenhauer, Lynn K. Daley
DATE
2007
IEEE
142views Hardware» more  DATE 2007»
15 years 7 months ago
Optimizing instruction-set extensible processors under data bandwidth constraints
We present a methodology for generating optimized architectures for data bandwidth constrained extensible processors. We describe a scalable Integer Linear Programming (ILP) formu...
Kubilay Atasu, Robert G. Dimond, Oskar Mencer, Way...