Sciweavers

7961 search results - page 1062 / 1593
» Input-Output Model Programs
Sort
View
DAC
1997
ACM
15 years 11 months ago
CLIP: An Optimizing Layout Generator for Two-Dimensional CMOS Cells
We present a novel technique CLIP for optimizing both the height and width of CMOS cell layouts in the two-dimensional (2D) style. CLIP is based on integer-linear programming (ILP...
Avaneendra Gupta, John P. Hayes
PADS
1996
ACM
15 years 11 months ago
Conservative Circuit Simulation on Shared-Memory Multiprocessors
We investigate conservative parallel discrete event simulations for logical circuits on shared-memory multiprocessors. For a first estimation of the possible speedup, we extend th...
Jörg Keller, Thomas Rauber, Bernd Rederlechne...
SOFSEM
1997
Springer
15 years 11 months ago
Path Layout in ATM Networks
This paper surveys recent results in the area of virtual path layout in ATM networks. We present a model for the theoretical study of these layouts the model amounts to covering t...
Shmuel Zaks
ICDE
1993
IEEE
103views Database» more  ICDE 1993»
15 years 11 months ago
IsaLog: A declarative language for complex objects with hierarchies
The IsaLog model and language are presented. The model has complex objects with classes, relations, and isa hierarchies. The language is strongly typed and declarative. The main i...
Paolo Atzeni, Luca Cabibbo, Giansalvatore Mecca
ICS
1992
Tsinghua U.
15 years 11 months ago
Optimizing for parallelism and data locality
Previous research has used program transformation to introduce parallelism and to exploit data locality. Unfortunately,these twoobjectives have usuallybeen considered independentl...
Ken Kennedy, Kathryn S. McKinley
« Prev « First page 1062 / 1593 Last » Next »